Update History
V1.0.1 / 26-February-2014
Main Changes
- DMA2D and BSP examples: ensure that all buffers used by the DMA2D are 4 bytes aligned
- BSP example
- Update system clock to 175 MHz (instead of 180
MHz) to have 50 MHz on PLL_Q output, to ensure that the clock provided
by the SDIO peripheral to the uSD card can't exceed 25 MHz (25MHz is
the maximum frequency in standard speed mode)
- Miscellaneous update
- Miscellaneous update on MPU and RTC Tamper examples
V1.0.0 / 18-February-2014
Main Changes
License
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For
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